Digital Logic Design Mini Projectsn Mini
CEDAR LS is an interactive digital logic simulator to be used in the teaching of digital logic design classes, or for testing simple digital designs. CEDAR Logic Simulator features both low-level logic objects, as well as some register-level functions. Features * Drag-and-drop interface o Gates are dragged from a categorized palette onto a. Freeware download of CEDAR Logic Simulator 1.5 Beta 1.0, size 4.30 Mb.
Simple Solver is a free Windows application that can simplify Boolean equations, truth tables and digital logic. The application includes six different tools: Boolean, Logic Design Draw, Logic Design Auto, Logic Simulation, Permutation and Random Number. These tools are built on years of engineering design experience and are intended for both. Freeware download of Simple Solver 4.1.4, size 1.57 Mb.
LogicWorks is an interactive circuit design tool intended for teaching and learning digital logic. No other software tool makes digital design easier, faster or more interactive than LogicWorks.
The package gives you the power, speed and flexibility to create and test an unlimited number of circuit elements on-screen. This means that. Free download of LogicWorks 5.0.2, size 20.53 Mb.
Is an emulator for signal analysis & digital circuits design using block diagrams, graphs & signal generation through math functions supports Convolution,FFT,Logic gates,Flip Flops,Displays, also integrates with Emu8086 as external IO device to the 80. Freeware download of Virtual IT Lab b.0.1, size 985.10 Kb.
Securely sign any document with a digital signature Design Universe Fill&Sign works like a printer, letting you sign any document on your Mobile PC. Simply open the document, print to Fill&Sign, and sign! You can also add security and save as PDF for safe transmission and archiving.
. Free download of Fill&Sign 18.104.22.168, size 24.21 Mb.
Logic Friday is a tool for students, hobbyists, and engineers who work with legacy digital logic circuits based on standard IC packages.
Logic Friday is a handy and comprehensive application which was designed to use espresso for minimization and misII options for gate diagram synthesis.
. Free download of Logic Friday 1.1.4, size 0 b.
Maximally flat (maxflat) digital filter design in Java, with arbitrary numbers of poles and zeros. "Maximally flat" means that the magnitude frequency response has the maximum number of vanishing derivatives at 0 and pi.. Freeware download of Maxflat Digital Filters (Java) 103, size 1.59 Mb.
Maximally flat (maxflat) digital filter design for Octave and Matlab. "Maximally flat" means that the magnitude frequency response has the maximum number of vanishing derivatives at 0 and pi. Handles arbitrary numbers of poles and zeros.. Freeware download of Maxflat Digital Filters (Octave, Matlab) 103, size 17.60 Kb.
This project will develop a system for high-level logic design and simulation embedded in the Ocaml (http://caml.inria.fr/ocaml) programming language.
Hardware Design Meta Language 1.0 License - Eclipse Public License; GNU General Public License (GPL); Qt Public License (QPL). Freeware download of Hardware Design Meta Language 1.0, size 0 b.
TimingTool is designed to give electronics engineers an easy to use graphical interface for entering and editing timing diagrams commonly seen in digital electronic design.
TimingTool is intuitive in use and always presents the most useful properties of selected objects for easy access.
Diagrams for analysis, design and. Free download of TimingTool 3.0, size 34.11 Mb.
A java based digital logic simulator, designed to be used as an educational tool. uses a GUI to allow users to quickly and easily create and visualise circuits from simple components. User can create custom components. Freeware download of DLSim 2, size 594.83 Kb.
Based upon Tony Fisher's Digital Filter design package, with updates. This is a package of tools that provide complete digital filter design including computing the coefficients, source code generation, and visualizing the frequency response.
mkfilter 1.0 License - GNU General Public License (GPL). Freeware download of mkfilter 1.0, size 0 b.
Dinotrace is a Verilog/VHDL waveform viewer for logic design traces for Linux/Windows X11. It includes color highlighting and back annotation of trace values onto source code inside Emacs. Please see www.veripool.org/dinotrace for lastest tarballs.
Dinotrace 1.0 License - GNU General Public License (GPL). Freeware download of Dinotrace 1.0, size 0 b.
fhlow is a design environment that handles the design-flow of the digital hardware design process for VHDL desings on FPGAs. It supports Mentor Graphics Modelsim and Altera Quartus by now.
fhlow - fast handling of a lot of work 1.0 License - GNU General Public License (GPL). Freeware download of fhlow - fast handling of a lot of work 1.0, size 0 b.
LogiFlash is an Adobe Flash based digital logic simulator. This project does a re-implementation of the existing ActionScript 1.0 based implementation (done at the Goethe University / Germany) in ActionScript 3.0 with new features.
LogiFlash 1.0 License - Non-Profit Open Software License 3.0 (Non-Profit OSL 3.0). Freeware download of LogiFlash 1.0, size 0 b.
LAnd Survey Tools "LAST" was created to preserve and expand on the work invested in an old, privately used, DOS based land survey construction and data collection application by porting much of the C++ coded logic and design concept over to Python.
LAnd Survey Tools 0.9.9.6 License - Open Software License 3.0 (OSL3.0). Freeware download of LAnd Survey Tools 0.9.9.6, size 425.03 Kb.
This project contains a framework, built to be used in a Digital Game Design Undergraduate course. Such framework allow a better learning of object-oriented principles by first-grade students.
JavaGame Framework 1.0 License - Public Domain. Freeware download of JavaGame Framework 1.0, size 27.92 Kb.
This plugin is based on a combination between digital logic and extreme pitch modulation.
. Free download of JunkMaster 1.0, size 503.32 Kb.
This is an ECAD toolkit for building programs and scripts to solve problems encounter in chip design.It currently addresses the layout, circuit and logic design areas.
Carrion 1.0 License - GNU Library or Lesser General Public License (LGPL). Freeware download of Carrion 1.0, size 0 b.
VeSpi is a Verilog to SPICE netlist conversion tool. It takes structural Verilog as input and produces an equivalent SPICE netlist compatible with Berkeley SPICE. This allows a designer to check analog properties of a digital logic block.
VeSpi 1.0 License - GNU Library or Lesser General Public License (LGPL). Freeware download of VeSpi 1.0, size 0 b.
Digital Logic Design Mini Projectsn Mini Web Results
Graphical tutorial describes how you can build digital logic circuits using 7400 series TTL gates.
Tutorials Fundamentals of Digital Logic
This is an interactive filter design package, for designing digital filters.
Fine art, digital photography and design.
Graphic design, and digital imagery, 2D and 3D illustration and animation for print, websites, multimedia and broadcast video. Developer of interactive CD-ROMs. Hudson, New Hampshire-based.
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Large format digital printing and design.