Verilog Software

Robei 2.0 Robei Inc. 

Robei is the world smallest EDA tool (less than 5Mbits) for verilog based EDA software. It integrates modern graphical user interface and a tiny cross platform verilog simulator. The biggest advantage of this software is that it is totally free for personal, education and research use.

Although Robei is very tiny, it has almost all the . Freeware download of Robei 2.0, size 4.48 Mb.


   
 

SynaptiCAD Product Suite 13.0 SynaptiCAD 

The SynaptiCAD Product Suite includes the following products: TestBencher Pro, VeriLogger Extreme, VeriLogger Pro, BugHunter Pro, DataSheet Pro, WaveFormer Pro, WaveFormer Lite, Timing Diagrammer Pro, GigaWave Viewer, Vhdl2Verilog, and Verilog2Vhdl. A license is required for all versions.

TestBencher Pro is a graphical test bench . Free download of SynaptiCAD Product Suite 13.0, size 129.92 Mb.

Active-HDL 8. 3. 2026 Aldec 

Active-HDL™ is a Windows® based integrated FPGA Design and Simulation solution. Active-HDL includes a full HDL graphical design tool suite and RTL/gate-level mixed-language Simulator. The design flow manager evokes 80 plus EDA and FPGA tools, during design, simulation, synthesis and implementation flows, making it a seamless and . Freeware download of Active-HDL 8. 3. 2026, size 329.76 Mb.

Wave VCD Viewer 1.0.0.1 Interconnect Systems Solution 

Wave VCD viewer is designed to bring digital design simulation results to your desktop PC. In a digital design environment the HDL designs are typically simulated in EDA workstations. The result of these simulations are saved in a file in VCD (value change dump file) format. Traditionally the VCD files are viewed on workstations which often becomes . Freeware download of Wave VCD Viewer 1.0.0.1, size 5.38 Mb.

HDL Works HDL Companion 2 4 HDL Works BV 

HDL Companion is the HDL designer's Swiss army knife. It will help you to get and keep a good overview of any HDL design, including third party IP, legacy code and other HDL sources. Complete design directories and design files are dragged into HDL Companion and a complete design overview is created in seconds, uncovering information regarding . Free download of HDL Works HDL Companion 2 4, size 20.57 Mb.

Aldec ALINT SR1 2010.10 Aldec, Inc. 

ALINT™ design analysis tool decreases verification time dramatically by identifying critical issues early in the design stage. Smart design rule checking (linting) points out coding style, functional, and structural problems that are extremely difficult to debug in simulators and prevents them from spreading into the downstream stages of . Free download of Aldec ALINT SR1 2010.10, size 140.33 Mb.

SystemCrafter SC 3.0 SystemCrafter 

SystemCrafter SC is a SystemC synthesis tool for Xilinx FPGAs.

SystemCrafter SC generates RTL VHDL or verilog for downstream synthesis to Xilinx FPGAs, and closes the verification gap by writing a structural SystemC output for simulation.

SystemCrafter SC

- is fully compatible with major C compilers, such as . Free download of SystemCrafter SC 3.0, size 6.26 Mb.

Ant16 Logic Analyser 2.1.0.65 RockyLogic 

The Ant16 software uses VCL40.BPL, a 1.8MByte shared Borland support library.

Like the Ant8, the Ant16 logic analyzer is compact, easy to use, powerful, and inexpensive. The Ant16 also features more channels (16), a synchronous acquisition mode, and Trigger-In and Trigger-Out connections.

Features :

- Familiar . Freeware download of Ant16 Logic Analyser 2.1.0.65, size 68.67 Mb.

CRiSP Programmers Editor 9 3 Vital, Inc. 

CRiSP is a programmers text editor designed to give user the power and flexibility to edit large files on multiple Unix, Linux, Windows and Mac platforms. CRiSP started life as a programmers text editor with BRIEF emulation, however after 15+ years of development, it now includes just about every conceivable editing feature that you could ever feel . Free download of CRiSP Programmers Editor 9 3, size 7.10 Mb.

createhierarchy 30 SEP 2012 Kanai Lal Ghosh 

createhierarchy was developed as a simple and accessible verilog hierarchy creation utility that is able to generate new hierarchy embedding sets on instances.

createhierarchy is an Open Source software that was developed with the help of the Java programming and can run on multiple platforms.


. Freeware download of createhierarchy 30 SEP 2012, size 0 b.

gentbvlog 30 SEP 2012 Kanai Lal Ghosh 

gentbvlog is an utility that is meant for users that want to analyze, elaborate and simulate their verilog top module.

This testbench generator has been developed with the help of the Java programming language and can run on multiple platforms.

. Freeware download of gentbvlog 30 SEP 2012, size 0 b.

PreProcessVerilog 03 FEB 2012 Kanai Lal Ghosh 

PreProcessVerilog was designed as an Open Source and handy verilog preprocessing utility.

This tool is designed for verilog users that want to preprocess their verilog files based upon various compiler directives.

This software has been implemented in the Java programming language and was packed as a JAR file.


verilogparser 03 FEB 2012 Kanai Lal Ghosh 

verilogparser is a simple, accessible and handy parser that's been developed for those who want to design their own utility around verilog RTL.

This parser has been developed in Java in order to make it platform independent. It reads RTL and populates its internal data structures.

There are APIs to extract the design . Freeware download of verilogparser 03 FEB 2012, size 0 b.

ViaDesigner 2012.2.1 ViaDesigner, Inc. 

Complete mixed signal electronic circuit schematic capture and simulation software. Combine schematics, SPICE, VHDL, verilog & VHDL-AMS in a unified design and simulation environment. Powerful and easy-to-use design wizards kick start your design. Design wizards include: filters, integrators, ADCs, DACs, power management, programmable gain . Free download of ViaDesigner 2012.2.1, size 831.69 Mb.

Verilog Netlist Parser 16 FEB 2013 Kanai Lal Ghosh 

netlistparser was designed as an accessible and handy verilog Netlist Parser. This utility has been created for those who want to develop his/her own tools/utilites around verilog netlist(s).

This netlistparser utility is implemented in Java and all the APIs are documented in the 'doc' directory.


. Freeware download of Verilog Netlist Parser 16 FEB 2013, size 0 b.

ipxact2verilog 03 FEB 2012 Kanai Lal Ghosh 

The ipxact2verilog generator utility was designed as a handy tool for those designers who want to ship their IP along with the IP-XACT view (component) of the same.

ipxact2verilog is an instrument that's been developed with the help of the Java programming language and can run on multiple platforms.



. Freeware download of ipxact2verilog 03 FEB 2012, size 0 b.

verilog2ipxact 03 FEB 2012 Kanai Lal Ghosh 

verilog2ipxact is built as an easy-to-use generator instrument that was specially created for designers that want to ship their IP along with the IP-XACT view.

verilog2ipxact is a tool that's been created with the help of the Java programming language and can run on multiple platforms.



. Freeware download of verilog2ipxact 03 FEB 2012, size 0 b.

netlistparser New Kanai Lal Ghosh 

netlistparser was designed as an accessible and handy verilog Netlist Parser.

This utility has been created for those who want to develop his/her own tools/utilites around verilog netlist(s).

This netlistparser utility is implemented in Java and all the APIs are documented in the 'doc' directory.


. Freeware download of netlistparser New, size 0 b.

flattenverilog New Kanai Lal Ghosh 

flattenverilog was designed as a Java-based and accessible utility that takes all the verilog RTL files along with the top verilog module name and traverses the entire hierarchy starting from the top.

It removes each of the instances by pulling that's functionality in the top module. Please note that it supports mainly the synthesizable . Freeware download of flattenverilog New, size 0 b.

zamiacad for Windows 0.10.3 Guenter Bartsch 

zamiaCAD is a modular and extensible platform for HW design, analysis, and research. It translates a HW description (VHDL or verilog) into a language independent IG structure. Applications like a simulator and an eclipse GUI build on top of the IG. . Freeware download of zamiacad for Windows 0.10.3, size 69.01 Mb.